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  1/7 june 2002 stp12nb30 STP12NB30FP n-channel 300v - 0.34 w - 12a to-220/to-220fp powermesh? mosfet (1) i sd 60a, di/dt 400 a/ m s, v dd 24v, tj t jmax (*)limited only by maximum temperature allowed n typical r ds (on) = 0.34 w n exceptional dv/dt capability n 100% avalanche tested n very low intrinsic capacitances n gate charge minimized description using the latest high voltage mesh overlay ? process, stmicroelectronics has designed an ad- vanced family of power mosfets with outstanding performances. the new patent pending strip layout coupled with the companys proprieraty edge termi- nation structure, gives the lowest r ds(on) per area, exceptional avalanche and dv/dt capabilities and unrivalled gate charge and switching characteris- tics. applications n high current, high speed switching n uninterruptible power supply (ups) n dc-dc & dc-ac converters for telecom, industrial and consumer environment absolute maximum ratings ( l ) pulse width limited by safe operating area type v dss r ds(on) i d stp12nb30 STP12NB30FP 300 v 300 v < 0.40 w < 0.40 w 12a 12a symbol parameter value unit stp12nb30 STP12NB30FP v ds drain-source voltage (v gs = 0) 300 v v dgr drain-gate voltage (r gs = 20 k w ) 300 v v gs gate- source voltage 30 v i d drain current (continuos) at t c = 25c 12 12 (*) a i d drain current (continuos) at t c = 100c 7.5 7.5 (*) a i dm ( l ) drain current (pulsed) 48 48 (*) a p tot total dissipation at t c = 25c 125 35 w derating factor 1 0.28 w/c dv/dt (1) peak diode recovery voltage slope 5.5 v/ns v iso insulation winthstand voltage (dc) -- 2500 v t stg storage temperature C65 to 150 c t j max. operating junction temperature to-220 1 2 3 1 2 3 to-220fp internal schematic diagram
stp12nb30 - STP12NB30FP 2/7 thermal data avalanche characteristics electrical characteristics (tcase = 25 c unless otherwise specified) off on (1) dynamic to-220 to-220fp rthj-case thermal resistance junction-case max 1 3.57 c/w rthj-amb thermal resistance junction-ambient max 62.5 c/w t l maximum lead temperature for soldering purpose 300 c symbol parameter max value unit i ar avalanche current, repetitive or not-repetitive (pulse width limited by t j max) 12 a e as single pulse avalanche energy (starting t j = 25 c, i d = i ar , v dd = 30 v) 250 mj symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 250 a, v gs = 0 300 v i dss zero gate voltage drain current (v gs = 0) v ds = max rating 1a v ds = max rating, t c = 125 c 10 a i gss gate-body leakage current (v ds = 0) v gs = 20v 100 na symbol parameter test conditions min. typ. max. unit v gs(th) gate threshold voltage v ds = v gs , i d = 250a 345v r ds(on) static drain-source on resistance v gs = 10v, i d = 6 a 0.34 0.4 w symbol parameter test conditions min. typ. max. unit g fs (1) forward transconductance v ds > i d(on) x r ds(on)max, i d =6a 7.2 s c iss input capacitance v ds = 25v, f = 1 mhz, v gs = 0 1050 pf c oss output capacitance 200 pf c rss reverse transfer capacitance 25 pf
3/7 stp12nb30 - STP12NB30FP electrical characteristics (continued) switching on switching off source drain diode note: 1. pulsed: pulse duration = 300 s, duty cycle 1.5 %. 2. pulse width limited by safe operating area. symbol parameter test conditions min. typ. max. unit t d(on) turn-on delay time v dd = 150 v, i d = 6 a r g = 4.7 w v gs = 10v (see test circuit, figure 3) 18 ns t r rise time 8 ns q g q gs q gd total gate charge gate-source charge gate-drain charge v dd = 240v, i d = 12a, v gs = 10v 29 11 12 40 nc nc nc symbol parameter test conditions min. typ. max. unit t d(off) t f t c off-voltage rise time fall time cross-over time vclamp =240v, i d = 12 a r g =4.7 w, v gs = 10v (see test circuit, figure 3) 10 10 18 ns ns ns symbol parameter test conditions min. typ. max. unit i sd source-drain current 12 a i sdm (2) source-drain current (pulsed) 48 a v sd (1) forward on voltage i sd = 12 a, v gs = 0 1.5 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 12 a, di/dt = 100a/s, v dd = 100v, t j = 150c (see test circuit, figure 5) 250 2 16 ns m c a
stp12nb30 - STP12NB30FP 4/7 fig. 5: test circuit for inductive load switching and diode recovery times fig. 4: gate charge test circuit fig. 2: unclamped inductive waveform fig. 1: unclamped inductive load test circuit fig. 3: switching times test circuit for resistive load
5/7 stp12nb30 - STP12NB30FP dim. mm inch min. typ. max. min. typ. max. a 4.40 4.60 0.173 0.181 c 1.23 1.32 0.048 0.051 d 2.40 2.72 0.094 0.107 d1 1.27 0.050 e 0.49 0.70 0.019 0.027 f 0.61 0.88 0.024 0.034 f1 1.14 1.70 0.044 0.067 f2 1.14 1.70 0.044 0.067 g 4.95 5.15 0.194 0.203 g1 2.4 2.7 0.094 0.106 h2 10.0 10.40 0.393 0.409 l2 16.4 0.645 l4 13.0 14.0 0.511 0.551 l5 2.65 2.95 0.104 0.116 l6 15.25 15.75 0.600 0.620 l7 6.2 6.6 0.244 0.260 l9 3.5 3.93 0.137 0.154 dia. 3.75 3.85 0.147 0.151 l6 a c d e d1 f g l7 l2 dia. f1 l5 l4 h2 l9 f2 g1 to-220 mechanical data p011c
stp12nb30 - STP12NB30FP 6/7 l2 a b d e h g l6 f l3 g1 123 f2 f1 l7 l4 l5 dim. mm. inch min. typ max. min. typ. max. a 4.4 4.6 0.173 0.181 b 2.5 2.7 0.098 0.106 d 2.5 2.75 0.098 0.108 e 0.45 0.7 0.017 0.027 f 0.75 1 0.030 0.039 f1 1.15 1.5 0.045 0.067 f2 1.15 1.5 0.045 0.067 g 4.95 5.2 0.195 0.204 g1 2.4 2.7 0.094 0.106 h 10 10.4 0.393 0.409 l2 16 0.630 l3 28.6 30.6 1.126 1.204 l4 9.8 10.6 0.385 0.417 l5 2.9 3.6 0.114 0.141 l6 15.9 16.4 0.626 0.645 l7 9 9.3 0.354 0.366 ? 3 3.2 0.118 0.126 to-220fp mechanical data
7/7 stp12nb30 - STP12NB30FP information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no res ponsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result f rom its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specificati ons mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devi ces or systems without express written approval of stmicroelectronics. ? the st logo is a registered trademark of stmicroelectronics ? 2002 stmicroelectronics - printed in italy - all rights reserved stmicroelectronics group of companies australia - brazil - canada - china - finland - france - germany - hong kong - india - israel - italy - japan - malaysia - malt a - morocco singapore - spain - sweden - switzerland - united kingdom - united states. ? http://www.st.com


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